Storage


JMicron SSD Controller Roadmap: JMF680 SATA 6Gbps & JMF815 PCIe Controllers Next Year

JMicron SSD Controller Roadmap: JMF680 SATA 6Gbps & JMF815 PCIe Controllers Next Year

JMicron is getting ready to ship its new JMF670H controller to its customers and we also have reference design samples in for testing, but in its suite at Computex JMicron shed light to its plans for future controllers. We stopped by JMicron last year as well and the plans have since changed a bit.

JMicron is already working on the successor of the JMF670H, which will simply be called JMF680. That’s still a SATA 6Gbps design, but it will bring support for TLC NAND thanks to what JMicron calls ‘advanced ECC’. JMicron is confident that its ECC implementation will be competitive against the LDPC engines that its competitors have and ultimately I believe that LDPC is more of a marketing gimmick at this point because everyone’s ECC algorithms and implementations are slightly different anyway, but the market is associating strong ECC and TLC enablement with LDPC. 

Another new feature in the JMF680 is increased capacity support that will go to up to 2TB. That is thanks to the updated (and larger) DRAM controller, which can now support up to 2GB as modern drives typically need about 1MB of DRAM cache per 1GB of NAND. The four NAND channels will also get an upgrade to Toggle 3.0 and ONFi 4.0 standards to support the upcoming NAND dies with faster interfaces. The JMF680 also supports Write Booster, which is JMicron’s SLC caching feature that debuts in the JMF670H (more on that in our upcoming JMF670H review).

On the PCIe side JMicron has canceled the JMF810 and JMF811 controllers, and will now be focusing solely on the JMF815. JMicron made the decision to concentrate on the value segment and thus the JMF815 is a PCIe 3.0 x2 design with four NAND channels (no NVMe, unfortunately). A four-lane design would have required moving to 28nm process node, which would have increased the cost substantially and the packaging would have to move away from BGA to FCBGA (used by e.g. Phison and SandForce in their upcoming PCIe controllers) that would further increase the cost. I think it’s a good play from JMicron to focus on a segment that isn’t as populated because right now everyone is focusing solely on performance with PCIe, but ultimately cost and power consumption will be a major factors in widespread adoption and JMicron should have an advantage there if the JMF815 is executed well.

First engineering samples of the JMF680 and JMF815 are expected to be ready in Q4’15 with first retail products entering the market in early 2016.

One of the trends I saw at Computex was the move towards DRAM-less SSD controllers. The JMF608 has been relatively popular in China given its ultra-low cost and its successor, the JMF60F, will be available within the next few months. It features an improved ECC engine and a larger capacity support as well as a new, cheaper QFN packaging. Following this trend, I wouldn’t be surprised if JMicron also has plans for DRAM-less versions of the JMF680 and JMF815.

All in all, JMicron has a pretty solid roadmap for 2016. It’s not aiming to be the performance leader, but to offer cost efficient designs for the value segment. We will have to wait and see how JMicron executes its PCIe controller, but in the meantime stay tuned for our JMF670H review that will be up in the coming weeks!

JMicron SSD Controller Roadmap: JMF680 SATA 6Gbps & JMF815 PCIe Controllers Next Year

JMicron SSD Controller Roadmap: JMF680 SATA 6Gbps & JMF815 PCIe Controllers Next Year

JMicron is getting ready to ship its new JMF670H controller to its customers and we also have reference design samples in for testing, but in its suite at Computex JMicron shed light to its plans for future controllers. We stopped by JMicron last year as well and the plans have since changed a bit.

JMicron is already working on the successor of the JMF670H, which will simply be called JMF680. That’s still a SATA 6Gbps design, but it will bring support for TLC NAND thanks to what JMicron calls ‘advanced ECC’. JMicron is confident that its ECC implementation will be competitive against the LDPC engines that its competitors have and ultimately I believe that LDPC is more of a marketing gimmick at this point because everyone’s ECC algorithms and implementations are slightly different anyway, but the market is associating strong ECC and TLC enablement with LDPC. 

Another new feature in the JMF680 is increased capacity support that will go to up to 2TB. That is thanks to the updated (and larger) DRAM controller, which can now support up to 2GB as modern drives typically need about 1MB of DRAM cache per 1GB of NAND. The four NAND channels will also get an upgrade to Toggle 3.0 and ONFi 4.0 standards to support the upcoming NAND dies with faster interfaces. The JMF680 also supports Write Booster, which is JMicron’s SLC caching feature that debuts in the JMF670H (more on that in our upcoming JMF670H review).

On the PCIe side JMicron has canceled the JMF810 and JMF811 controllers, and will now be focusing solely on the JMF815. JMicron made the decision to concentrate on the value segment and thus the JMF815 is a PCIe 3.0 x2 design with four NAND channels (no NVMe, unfortunately). A four-lane design would have required moving to 28nm process node, which would have increased the cost substantially and the packaging would have to move away from BGA to FCBGA (used by e.g. Phison and SandForce in their upcoming PCIe controllers) that would further increase the cost. I think it’s a good play from JMicron to focus on a segment that isn’t as populated because right now everyone is focusing solely on performance with PCIe, but ultimately cost and power consumption will be a major factors in widespread adoption and JMicron should have an advantage there if the JMF815 is executed well.

First engineering samples of the JMF680 and JMF815 are expected to be ready in Q4’15 with first retail products entering the market in early 2016.

One of the trends I saw at Computex was the move towards DRAM-less SSD controllers. The JMF608 has been relatively popular in China given its ultra-low cost and its successor, the JMF60F, will be available within the next few months. It features an improved ECC engine and a larger capacity support as well as a new, cheaper QFN packaging. Following this trend, I wouldn’t be surprised if JMicron also has plans for DRAM-less versions of the JMF680 and JMF815.

All in all, JMicron has a pretty solid roadmap for 2016. It’s not aiming to be the performance leader, but to offer cost efficient designs for the value segment. We will have to wait and see how JMicron executes its PCIe controller, but in the meantime stay tuned for our JMF670H review that will be up in the coming weeks!

Nantero Exits Stealth: Using Carbon Nanotubes for Non-Volatile Memory with DRAM Performance & Unlimited Endurance

Nantero Exits Stealth: Using Carbon Nanotubes for Non-Volatile Memory with DRAM Performance & Unlimited Endurance

The race for next generation non-volatile memory technology is already on at full throttle. We covered Crossbar’s ReRAM announcement last year and last week a very exciting company with a different non-volatile technology exited stealth mode and shed light on its technology and commercialization plans. The company is called Nantero and it’s been developing its NRAM technology for well over a decade now.

Before we talk about the technology itself, let’s briefly discuss the company and its key persons as Nantero is probably an unfamiliar name to many (it was for me, at least). The company was founded by Greg Schmergel, Dr. Tom Rueckes and Dr. Brent M. Segal in 2001. Mr. Schmergel and Dr. Rueckes are both still with the company and serve as CEO and CTO respectively, but Dr. Segal left the company in 2008 as a part of Nantero’s Government Business Unit acquisition by Lockheed Martin. Mr. Schmergel is a well renowned serial entrepreneur who founded ExpertCentral that was later acquired by About.com where Mr. Schmergel served as a Senior Vice President before co-founding Nantero. While Mr. Schmergel brings valuable business expertise to the company, the technology comes from Dr. Tom Rueckes who is a Harvard Ph.D in chemistry and the inventor of NRAM technology.

The Board of Directors includes several semiconductor industry veterans. Mr. Lai was one of the leading developers of NAND technology at Intel and also led Intel’s Phase Change Memory (PCM) team. Dr. Makimoto is a former Chief Technologist of Sony and Hitachi and Mr. Scalise is actually the former President of Silicon Industry Association (SIA) and also served as an Executive Vice President at Apple briefly in the late 90s. Mr. Raam may too be a familiar name to some since he is the former CEO of SandForce (the SSD controller company) that is now owned by Seagate.

The Technology

It goes without saying that Nantero is packed with semiconductor experience and know-how, but its technology isn’t any less interesting. NRAM is made out of carbon nanotubes, which is the strongest material known to man and provides far better thermal and electrical conductivity than any other known material.

The way NRAM works is in fact relatively simple. Essentially there are two nanotubes, which have low resistance when in physical contact and high resistance when separated. The amount of resistance then determines whether the cell is considered to be programmed as ‘0’ or ‘1’. Program operation (or “SET” as Nantero calls it) works by applying a voltage on one of the nanotubes, which will then attract the other nanotube and create a bond. The SET operation is very fast and takes only picoseconds, which is on par with or better than DRAM latency. The bond is kept in tact by Van der Waal’s interactions and is practically immortal with data retention terms even in 300°C is over ten years. In an erase operation (or RESET as Nantero calls it) the voltage is simply applied in the other direction, which will “heat up” (given the scale it’s more like vibration) the nanotube contacts and cause them to separate. Given that carbon nanotubes are one of the strongest materials in the world, the write/erase endurance is practically infinite as independent university study has shown Nantero’s NRAM technology to have over 1011 P/E cycles (for your information, 1011 translates to 100 billion). 

The other great news is that carbon nanotubes are extremely small. One nanotube can have a diameter of only 2nm and the pitch between the two nanotubes in off-state can be an even tinier 1nm, so the technology has potential to scale below 5nm. NRAM can also scale vertically, or go 3D, and since the cell structure and manufacturing process are both quite simple, 3D stacking should, in theory, be much easier compared to what 3D NAND is today with no need for high aspect ratio etching as an example.

The Manufacturing Process

The process of making an NRAM wafer starts by taking a normal CMOS wafer with the normal cell select and array line circuitry, which is then spin coated with carbon nanotubes. Carbon nanotubes are grown from iron that would normally contaminate a clean room, thus Nantero had to develop a patented process that creates ‘pure’ carbon nanotubes with less than one out of billion particles being foreign (the standard for the highest quality clean rooms). Nantero has worked hard in the past two years to bring the cost of carbon nanotubes down and currently the company says that the nanotubes have a negligible impact on chip cost, meaning making NRAM isn’t inherently more expensive than any other semiconductor. 

Top-down SEM of NRAM

With the nanotubes on the wafer, the top electrode is deposited on top of the nanotubes, followed by the photoresist, which is then patterned using a single mask. Finally the wafer is etched to cut the nanotubes into smaller pieces (i.e. more memory cells) and that’s it in a nutshell. Obviously there are other general semiconductor processing steps involved, but those are the same for all memory technologies, so the fundamental process of manufacturing NRAM isn’t that complex. All that is needed is a normal CMOS fab because the NRAM process requires no special or additional tools.

Fortunately, NRAM isn’t just a technology that exists on paper. Nantero’s NRAM process has already been installed in seven production CMOS fabs ranging from 20nm to 250nm and limited production has been taking place for several years now, although only in small few megabit capacities. As a matter of fact, Nantero completed a successful space test with NASA on Space Shuttle Atlantis back in 2009 where NRAM operated without any shielding throughout the trip without any errors despite the intense radiation, because as I mentioned earlier, the nanotube bonds are practically unbreakable and are not affected by heat, magnetism, radiation and the like.

Nantero’s Business Plan: Bringing NRAM to Everyone

Because Nantero is an IP licensing company, it relies solely on its partners for production. It’s a logical strategy because a decent sized fab requires an investment in the order of billions of dollars and in the end the company would have to compete against Intel, Samsung and the rest of the semiconductor giants. Actual end products will be sold under the manufacturer’s brand (e.g. Intel), so you won’t see any Nantero branded products on the market. 

Nantero isn’t disclosing any of its partners at this point as most of them are still developing products that have the potential for higher volume production. While Nantero has its own chip team that is developing high capacity (several gigabits) dies, every partner is also doing its own work to implement NRAM at a larger scale, which makes sense given that the big semiconductor companies have far more resources and are familiar with high capacity memory devices.

Aside from semiconductor companies, Nantero has also partnered with several more consumer-facing companies to develop concepts and products around NRAM technology. Since NRAM provides the same level of performance as DRAM but is non-volatile, NRAM could open the doors for products that aren’t achievable (at least properly) with today’s NAND and DRAM technology. As examples Nantero mentions 3D smartphones and commercial 3D printers (although to be frank both already exist to some extent), but practically anything that’s handicapped by IO performance and volatility can be fixed with NRAM in the future. 

Since it will take several years before NRAM is even close to modern NAND capacities, Nantero has a three step strategy of bringing NRAM to the market. In the first step Nantero is simply offering a class of memory (both standalone and embedded) that has DRAM’s performance characteristics and NAND’s non-volatility. Technically that means NRAM is competing against current MRAM and ReRAM products for a specialized niche market that really needs high performance and non-volatility. The consumer market is obviously not one of those and even for the enterprise NRAM is likely too small capacity and expensive, but the industrial and especially space/military applications should benefit from NRAM despite the high initial cost. 

The next step is to grow NRAM to gigabit-class capacities and offer a non-volatile alternative to DRAM. Going to gigabit-class certainly opens the doors for NRAM as a mainstream memory because it could be used for a variety of caching applications that benefit from non-volatility (SSDs with their DRAM caches for NAND mapping table are a prime example). Tape out of first gigabit NRAM wafers is still about 18 months away, so I would expect to see something shipping perhaps in late 2017 or 2018.

The final step, of course, is a terabit-class die to replace NAND (FYI, Samsung is projecting 1Tbit NAND die in 2017). Achieving that requires work on both lithography scaling and 3D integration technologies because such a high capacity die is only economical with either multiple layers or advanced lithography, or both.

NRAM also has the potential to operate in MLC mode for further density improvements, but for now Nantero is focusing on scaling NRAM down and adding layers through 3D to increase density. Once the work on those two is done and has been implemented to a production fab, Nantero will start commercializing NRAM MLC technology, but that is likely at least several years away.

Final Words

The announcement is intriguing to say the least. From a technology standpoint NRAM sounds very exciting because it’s effectively bringing us non-volatile DRAM performance, and better yet the cell design is scalable whereas DRAM has major struggles going below 20nm. I like the fact that Nantero has decided to go with IP licensing model because it means that NRAM is a technology available to everyone. The reason why DRAM and NAND are where they are today is because there are multiple companies producing them, resulting in competition with billions of R&D dollars.  

I wonder if any of the big semiconductor companies has partnered with Nantero yet. Most of them have been tight-lipped about their post-NAND plans, but maybe Nantero’s announcement will sooner than later force the companies to talk about their strategies. Obviously a lot depends on how far 3D NAND can efficiently scale, but from what I have heard the transition to next generation memory technologies should begin around 2020. The future of memory isn’t here yet, but it’s certainly getting closer and it will be interesting to see what technology ends up taking the crown.

Nantero Exits Stealth: Using Carbon Nanotubes for Non-Volatile Memory with DRAM Performance & Unlimited Endurance

Nantero Exits Stealth: Using Carbon Nanotubes for Non-Volatile Memory with DRAM Performance & Unlimited Endurance

The race for next generation non-volatile memory technology is already on at full throttle. We covered Crossbar’s ReRAM announcement last year and last week a very exciting company with a different non-volatile technology exited stealth mode and shed light on its technology and commercialization plans. The company is called Nantero and it’s been developing its NRAM technology for well over a decade now.

Before we talk about the technology itself, let’s briefly discuss the company and its key persons as Nantero is probably an unfamiliar name to many (it was for me, at least). The company was founded by Greg Schmergel, Dr. Tom Rueckes and Dr. Brent M. Segal in 2001. Mr. Schmergel and Dr. Rueckes are both still with the company and serve as CEO and CTO respectively, but Dr. Segal left the company in 2008 as a part of Nantero’s Government Business Unit acquisition by Lockheed Martin. Mr. Schmergel is a well renowned serial entrepreneur who founded ExpertCentral that was later acquired by About.com where Mr. Schmergel served as a Senior Vice President before co-founding Nantero. While Mr. Schmergel brings valuable business expertise to the company, the technology comes from Dr. Tom Rueckes who is a Harvard Ph.D in chemistry and the inventor of NRAM technology.

The Board of Directors includes several semiconductor industry veterans. Mr. Lai was one of the leading developers of NAND technology at Intel and also led Intel’s Phase Change Memory (PCM) team. Dr. Makimoto is a former Chief Technologist of Sony and Hitachi and Mr. Scalise is actually the former President of Silicon Industry Association (SIA) and also served as an Executive Vice President at Apple briefly in the late 90s. Mr. Raam may too be a familiar name to some since he is the former CEO of SandForce (the SSD controller company) that is now owned by Seagate.

The Technology

It goes without saying that Nantero is packed with semiconductor experience and know-how, but its technology isn’t any less interesting. NRAM is made out of carbon nanotubes, which is the strongest material known to man and provides far better thermal and electrical conductivity than any other known material.

The way NRAM works is in fact relatively simple. Essentially there are two nanotubes, which have low resistance when in physical contact and high resistance when separated. The amount of resistance then determines whether the cell is considered to be programmed as ‘0’ or ‘1’. Program operation (or “SET” as Nantero calls it) works by applying a voltage on one of the nanotubes, which will then attract the other nanotube and create a bond. The SET operation is very fast and takes only picoseconds, which is on par with or better than DRAM latency. The bond is kept in tact by Van der Waal’s interactions and is practically immortal with data retention terms even in 300°C is over ten years. In an erase operation (or RESET as Nantero calls it) the voltage is simply applied in the other direction, which will “heat up” (given the scale it’s more like vibration) the nanotube contacts and cause them to separate. Given that carbon nanotubes are one of the strongest materials in the world, the write/erase endurance is practically infinite as independent university study has shown Nantero’s NRAM technology to have over 1011 P/E cycles (for your information, 1011 translates to 100 billion). 

The other great news is that carbon nanotubes are extremely small. One nanotube can have a diameter of only 2nm and the pitch between the two nanotubes in off-state can be an even tinier 1nm, so the technology has potential to scale below 5nm. NRAM can also scale vertically, or go 3D, and since the cell structure and manufacturing process are both quite simple, 3D stacking should, in theory, be much easier compared to what 3D NAND is today with no need for high aspect ratio etching as an example.

The Manufacturing Process

The process of making an NRAM wafer starts by taking a normal CMOS wafer with the normal cell select and array line circuitry, which is then spin coated with carbon nanotubes. Carbon nanotubes are grown from iron that would normally contaminate a clean room, thus Nantero had to develop a patented process that creates ‘pure’ carbon nanotubes with less than one out of billion particles being foreign (the standard for the highest quality clean rooms). Nantero has worked hard in the past two years to bring the cost of carbon nanotubes down and currently the company says that the nanotubes have a negligible impact on chip cost, meaning making NRAM isn’t inherently more expensive than any other semiconductor. 

Top-down SEM of NRAM

With the nanotubes on the wafer, the top electrode is deposited on top of the nanotubes, followed by the photoresist, which is then patterned using a single mask. Finally the wafer is etched to cut the nanotubes into smaller pieces (i.e. more memory cells) and that’s it in a nutshell. Obviously there are other general semiconductor processing steps involved, but those are the same for all memory technologies, so the fundamental process of manufacturing NRAM isn’t that complex. All that is needed is a normal CMOS fab because the NRAM process requires no special or additional tools.

Fortunately, NRAM isn’t just a technology that exists on paper. Nantero’s NRAM process has already been installed in seven production CMOS fabs ranging from 20nm to 250nm and limited production has been taking place for several years now, although only in small few megabit capacities. As a matter of fact, Nantero completed a successful space test with NASA on Space Shuttle Atlantis back in 2009 where NRAM operated without any shielding throughout the trip without any errors despite the intense radiation, because as I mentioned earlier, the nanotube bonds are practically unbreakable and are not affected by heat, magnetism, radiation and the like.

Nantero’s Business Plan: Bringing NRAM to Everyone

Because Nantero is an IP licensing company, it relies solely on its partners for production. It’s a logical strategy because a decent sized fab requires an investment in the order of billions of dollars and in the end the company would have to compete against Intel, Samsung and the rest of the semiconductor giants. Actual end products will be sold under the manufacturer’s brand (e.g. Intel), so you won’t see any Nantero branded products on the market. 

Nantero isn’t disclosing any of its partners at this point as most of them are still developing products that have the potential for higher volume production. While Nantero has its own chip team that is developing high capacity (several gigabits) dies, every partner is also doing its own work to implement NRAM at a larger scale, which makes sense given that the big semiconductor companies have far more resources and are familiar with high capacity memory devices.

Aside from semiconductor companies, Nantero has also partnered with several more consumer-facing companies to develop concepts and products around NRAM technology. Since NRAM provides the same level of performance as DRAM but is non-volatile, NRAM could open the doors for products that aren’t achievable (at least properly) with today’s NAND and DRAM technology. As examples Nantero mentions 3D smartphones and commercial 3D printers (although to be frank both already exist to some extent), but practically anything that’s handicapped by IO performance and volatility can be fixed with NRAM in the future. 

Since it will take several years before NRAM is even close to modern NAND capacities, Nantero has a three step strategy of bringing NRAM to the market. In the first step Nantero is simply offering a class of memory (both standalone and embedded) that has DRAM’s performance characteristics and NAND’s non-volatility. Technically that means NRAM is competing against current MRAM and ReRAM products for a specialized niche market that really needs high performance and non-volatility. The consumer market is obviously not one of those and even for the enterprise NRAM is likely too small capacity and expensive, but the industrial and especially space/military applications should benefit from NRAM despite the high initial cost. 

The next step is to grow NRAM to gigabit-class capacities and offer a non-volatile alternative to DRAM. Going to gigabit-class certainly opens the doors for NRAM as a mainstream memory because it could be used for a variety of caching applications that benefit from non-volatility (SSDs with their DRAM caches for NAND mapping table are a prime example). Tape out of first gigabit NRAM wafers is still about 18 months away, so I would expect to see something shipping perhaps in late 2017 or 2018.

The final step, of course, is a terabit-class die to replace NAND (FYI, Samsung is projecting 1Tbit NAND die in 2017). Achieving that requires work on both lithography scaling and 3D integration technologies because such a high capacity die is only economical with either multiple layers or advanced lithography, or both.

NRAM also has the potential to operate in MLC mode for further density improvements, but for now Nantero is focusing on scaling NRAM down and adding layers through 3D to increase density. Once the work on those two is done and has been implemented to a production fab, Nantero will start commercializing NRAM MLC technology, but that is likely at least several years away.

Final Words

The announcement is intriguing to say the least. From a technology standpoint NRAM sounds very exciting because it’s effectively bringing us non-volatile DRAM performance, and better yet the cell design is scalable whereas DRAM has major struggles going below 20nm. I like the fact that Nantero has decided to go with IP licensing model because it means that NRAM is a technology available to everyone. The reason why DRAM and NAND are where they are today is because there are multiple companies producing them, resulting in competition with billions of R&D dollars.  

I wonder if any of the big semiconductor companies has partnered with Nantero yet. Most of them have been tight-lipped about their post-NAND plans, but maybe Nantero’s announcement will sooner than later force the companies to talk about their strategies. Obviously a lot depends on how far 3D NAND can efficiently scale, but from what I have heard the transition to next generation memory technologies should begin around 2020. The future of memory isn’t here yet, but it’s certainly getting closer and it will be interesting to see what technology ends up taking the crown.

Plextor M7e PCIe SSD to Ship in Q3, M7V TLC SSD in 2016 & New Software Features

Plextor M7e PCIe SSD to Ship in Q3, M7V TLC SSD in 2016 & New Software Features

Plextor first showed off the M7e at CES earlier this year and at Computex we got an update on the release schedule. Plextor is now aiming for Q3 release, meaning that we will likely hear the final release at Flash Memory Summit in August. Specifications have not really changed since the M7e still utilizes the same Marvell PCIe 2.0 x4 AHCI controller with performance rated at up to 1.4GB/s read and 1GB/s write as well as up to 125K random read and 140K write IOPS. M7e will be available in both M.2 and PCIe card form factors with capacities range from 256GB to 1TB, so the M7e may very well be the first M.2 2280 drive to break the 1TB barrier. 

Regarding the TLC drive M6V (or M7V as Plextor now calls it), Plextor is taking its time to fine tune the firmware to squeeze every megabyte of performance out of the drive and more importantly ensure high reliability and endurance. Plextor told me that its firmware can boost the endurance to 2,000 P/E cycles with 15nm TLC, so it the claim holds true then I’m fine with Plextor taking a little longer and pushing the release to 2016.

On the software side, Plextor actually had three new items to show. The first one is updated PlexTurbo, which now carries version number 3 and increases the maximum cache size to 16GB. The cache size is also now user adjustable and supports multiple disks, so one can decide what Plextor SSD to speed up with PlexTurbo.

The first new addition to Plextor’s software suite is PlexVault, which creates a hidden partition for storing sensitive data. The partition is completely hidden and isn’t even visible in Disk Management, so other users won’t even know that such hidden partition exists. Accessing the partition works through a hot key, although a password can also be entered to protect the hidden partition from accidental access. I’m not sure how useful the feature really is, but I guess it creates another layer of security for NSFW (not safe for the wife) content for those who may need it. 

The final piece of new software is PlexCompressor, which is an automated compression utility. If a file is not accessed for 30 days, PlexCompressor will automatically compress the file to increase free space. The file will then be uncompressed when accessed, which obviously takes a bit of the free space since the file will now be stored in uncompressed format for another 30 days. The compression is transparent to the user and is done fully in software (i.e. by the CPU), so it’s not SandForce-like hardware compression. There is no impact on SSD performance, although as compression consumes some CPU cycles there may be impact on CPU heavy workloads and especially battery life. Out of the three pieces of software Plextor has, I think PlexCompressor is the most potent because it results in concrete extra free space for the end-user and with SSD prices still being relatively high (compared to HDDs) it makes sense to get the most out of the storage one has.