DRAM


JEDEC: DDR5 to Double Bandwidth Over DDR4, NVDIMM-P Specification Due Next Year

JEDEC: DDR5 to Double Bandwidth Over DDR4, NVDIMM-P Specification Due Next Year

JEDEC made two important announcements about the future of DRAM and non-volatile DIMMs for servers last week. Development of both is proceeding as planned and JEDEC intends to preview them in the middle of this year and publish the final specifications sometimes in 2018.

Traditionally each new successive DRAM memory standard aims for consistent jumps: doubling the bandwidth per pin, reducing power consumption by dropping Vdd/Vddq voltage, and increasing the maximum capacity of memory ICs (integrated circuits). DDR5 will follow this trend and JEDEC last week confirmed that it would double the bandwidth and density over DDR4, improve performance, and power efficiency.

Given that official DDR4 standard covers chips with up to 16 Gb capacity and with up to 2133-3200 MT/s data rate per pin, doubling that means 32 Gb ICs with up to 4266-6400 MT/s data rate per pin. If DDR5 sustains 64-bit interface for memory modules, we will see single-sided 32 GB DDR5-6400 DIMMs with 51.2 GB/s bandwidth in the DDR5 era. Speaking of modules, it is interesting to note that among other things DDR5 promises “a more user-friendly interface”, which probably means a new retention mechanism or increased design configurability.


Samsung’s DDR4 memory modules. Image for illustrative purposes only.

Part of the DDR5 specification will be improved channel use and efficiency. Virtually all modern random access memory sub-systems are single-channel, dual-channel or multi-channel, but actual memory bandwidth of such systems does not increase linearly with the increase of the number of channels (i.e., channel utilization decreases). Part of the problem is the fact that host cores fight for DRAM bandwidth, and memory scheduling is a challenge for CPU and SoC developers. Right now we do not know how DRAM developers at JEDEC plan to address the memory channel efficiency problem on the specification level, but if they manage to even partly solve the problem, that will be a good news. Host cores will continue to fight for bandwidth and memory scheduling will remain important, but if channel utilization increases it could mean both performance and power advantages. Keep in mind that additional memory channels mean additional DRAM ICs and a significant increase in power consumption, which is important for mobile DRAM subsystems, but it is also very important for servers.

JEDEC plans to disclose more information about the DDR5 specification at its Server Forum event in Santa Clara on June 19, 2017, and then publish the spec in 2018. It is noteworthy that JEDEC published the DDR4 specification in September 2012, whereas large DRAM makers released samples of their DDR4 chips/modules a little before that. Eventually, Intel launched the world’s first DDR4-supporting platforms in 2014, two years after the standard was finalized. If DDR5 follows the same path, we will see systems using the new type of DRAM in 2020 or 2021.

Another specification that JEDEC plans to finalize in 2018 is the NVDIMM-P that will enable high-capacity memory modules featuring persistent memory (flash, 3D XPoint, new types of storage-class memory, etc.) and DRAM. The capacity of today’s NVDIMM-Ns is limited to the capacity of regular server DRAM modules, but the NVDIMM-P promises to change that and increase capacities of modules to hundreds of GBs or even to TBs. The NVDIMM-P is currently a work in progress and we are going to learn more about the tech in June.

Related Reading

Sources of images: SNIA, Samsung

JEDEC: DDR5 to Double Bandwidth Over DDR4, NVDIMM-P Specification Due Next Year

JEDEC: DDR5 to Double Bandwidth Over DDR4, NVDIMM-P Specification Due Next Year

JEDEC made two important announcements about the future of DRAM and non-volatile DIMMs for servers last week. Development of both is proceeding as planned and JEDEC intends to preview them in the middle of this year and publish the final specifications sometimes in 2018.

Traditionally each new successive DRAM memory standard aims for consistent jumps: doubling the bandwidth per pin, reducing power consumption by dropping Vdd/Vddq voltage, and increasing the maximum capacity of memory ICs (integrated circuits). DDR5 will follow this trend and JEDEC last week confirmed that it would double the bandwidth and density over DDR4, improve performance, and power efficiency.

Given that official DDR4 standard covers chips with up to 16 Gb capacity and with up to 2133-3200 MT/s data rate per pin, doubling that means 32 Gb ICs with up to 4266-6400 MT/s data rate per pin. If DDR5 sustains 64-bit interface for memory modules, we will see single-sided 32 GB DDR5-6400 DIMMs with 51.2 GB/s bandwidth in the DDR5 era. Speaking of modules, it is interesting to note that among other things DDR5 promises “a more user-friendly interface”, which probably means a new retention mechanism or increased design configurability.


Samsung’s DDR4 memory modules. Image for illustrative purposes only.

Part of the DDR5 specification will be improved channel use and efficiency. Virtually all modern random access memory sub-systems are single-channel, dual-channel or multi-channel, but actual memory bandwidth of such systems does not increase linearly with the increase of the number of channels (i.e., channel utilization decreases). Part of the problem is the fact that host cores fight for DRAM bandwidth, and memory scheduling is a challenge for CPU and SoC developers. Right now we do not know how DRAM developers at JEDEC plan to address the memory channel efficiency problem on the specification level, but if they manage to even partly solve the problem, that will be a good news. Host cores will continue to fight for bandwidth and memory scheduling will remain important, but if channel utilization increases it could mean both performance and power advantages. Keep in mind that additional memory channels mean additional DRAM ICs and a significant increase in power consumption, which is important for mobile DRAM subsystems, but it is also very important for servers.

JEDEC plans to disclose more information about the DDR5 specification at its Server Forum event in Santa Clara on June 19, 2017, and then publish the spec in 2018. It is noteworthy that JEDEC published the DDR4 specification in September 2012, whereas large DRAM makers released samples of their DDR4 chips/modules a little before that. Eventually, Intel launched the world’s first DDR4-supporting platforms in 2014, two years after the standard was finalized. If DDR5 follows the same path, we will see systems using the new type of DRAM in 2020 or 2021.

Another specification that JEDEC plans to finalize in 2018 is the NVDIMM-P that will enable high-capacity memory modules featuring persistent memory (flash, 3D XPoint, new types of storage-class memory, etc.) and DRAM. The capacity of today’s NVDIMM-Ns is limited to the capacity of regular server DRAM modules, but the NVDIMM-P promises to change that and increase capacities of modules to hundreds of GBs or even to TBs. The NVDIMM-P is currently a work in progress and we are going to learn more about the tech in June.

Related Reading

Sources of images: SNIA, Samsung

Samsung Begins To Produce DDR4 Memory Using '10nm Class' Process Tech

Samsung Begins To Produce DDR4 Memory Using ’10nm Class’ Process Tech

Samsung Electronics has started to manufacture DDR4 memory using its new ’10nm class’ production technology. ’10nm class’, by definition, implies sub-20nm but without fully disclosing the methodology, similar to the first sub-20nm NAND production that used 1x/1y terminology. By using a sub-20 nm fabrication process, this typically helps a company make ICs/DRAM cheaper, faster and more energy efficient, depending on the process complexity. In this case, Samsung continues to use ArF (argon fluoride) immersion lithography tools with quadruple patterning to make its latest memory, which indicates a very high complexity of the new process tech. What is also important is that the new DRAMs feature Samsung’s new memory cell structure.

In the news today, Samsung’s new DDR4 memory chips are produced using 10nm-class manufacturing technology, have 8 Gb capacity, and can operate at 3200 Mbit/s data rate (DDR4-3200). In addition, the new DRAM devices are reported to consume 10 – 20% less power than equivalent DDR4 memory ICs made using a 20 nm fabrication process, based on tests conducted by the memory maker. Finally, Samsung can produce 30% more 8 Gb chips on a single 300 mm wafer thanks to the new manufacturing technology, which will lower their costs once their yields match those of current-gen chips due to having more chips per wafer.

Samsung does not disclose many details about its production process, such as its smallest half-pitch size (which gives actual names to DRAM manufacturing technologies, such as 20 nm or 25 nm). What we do know is that the new tech stacks very narrow cylinder-shaped capacitors on top of transistors, which implies a new DRAM cell structure (4F2?). Manufacturers of memory have historically changed the structures of DRAM cells every five or six years, and each change represents a major technology challenge as the density changes. Samsung says that it has refined the dielectric layer deposition technology and enabled substantial performance improvements, which may mean that the new memory chips can have a higher clock-rate potential than Samsung’s existing DRAMs, or more units will pass the base tests. If this is the case, if we extrapolate, this may open doors to DDR4 memory modules with unprecedented data rates (e.g., higher than DDR4-4400). Nonetheless, use of quadruple patterning significantly increases the complexity of manufacturing, which may somewhat slow down the ramp up of the new memory ICs and cause delays in increased yield refinements.

Samsung claims that later this year it intends to use its 1x nm manufacturing technology to make LPDDR memory with increased capacity, which should help makers of smartphones, tablets and notebooks boost the amount of DRAM inside their devices or reduce pricing.

Use of the sub-20 nm process technology to produce 8 Gb DDR4 chips should make such DRAM ICs cheaper (eventually), which will help PC and server makers to install more memory without increasing prices of their products. At press time, one 8 Gb DDR4 chip costs $4.688, according to DRAMeXchange. By contrast, a 4 Gb DDR4 IC is priced at $1.672. Therefore, using low-capacity chips is still cheaper than using high-capacity DRAM devices. Meanwhile, if you are building servers, you might not have a choice but to utilize 8 Gb chips to create high-end memory modules (i.e., with 128 GB capacities). For that reason, for server manufacturers, Samsung’s new 8 Gb DDR4 chips should be useful.

Samsung Begins To Produce DDR4 Memory Using '10nm Class' Process Tech

Samsung Begins To Produce DDR4 Memory Using ’10nm Class’ Process Tech

Samsung Electronics has started to manufacture DDR4 memory using its new ’10nm class’ production technology. ’10nm class’, by definition, implies sub-20nm but without fully disclosing the methodology, similar to the first sub-20nm NAND production that used 1x/1y terminology. By using a sub-20 nm fabrication process, this typically helps a company make ICs/DRAM cheaper, faster and more energy efficient, depending on the process complexity. In this case, Samsung continues to use ArF (argon fluoride) immersion lithography tools with quadruple patterning to make its latest memory, which indicates a very high complexity of the new process tech. What is also important is that the new DRAMs feature Samsung’s new memory cell structure.

In the news today, Samsung’s new DDR4 memory chips are produced using 10nm-class manufacturing technology, have 8 Gb capacity, and can operate at 3200 Mbit/s data rate (DDR4-3200). In addition, the new DRAM devices are reported to consume 10 – 20% less power than equivalent DDR4 memory ICs made using a 20 nm fabrication process, based on tests conducted by the memory maker. Finally, Samsung can produce 30% more 8 Gb chips on a single 300 mm wafer thanks to the new manufacturing technology, which will lower their costs once their yields match those of current-gen chips due to having more chips per wafer.

Samsung does not disclose many details about its production process, such as its smallest half-pitch size (which gives actual names to DRAM manufacturing technologies, such as 20 nm or 25 nm). What we do know is that the new tech stacks very narrow cylinder-shaped capacitors on top of transistors, which implies a new DRAM cell structure (4F2?). Manufacturers of memory have historically changed the structures of DRAM cells every five or six years, and each change represents a major technology challenge as the density changes. Samsung says that it has refined the dielectric layer deposition technology and enabled substantial performance improvements, which may mean that the new memory chips can have a higher clock-rate potential than Samsung’s existing DRAMs, or more units will pass the base tests. If this is the case, if we extrapolate, this may open doors to DDR4 memory modules with unprecedented data rates (e.g., higher than DDR4-4400). Nonetheless, use of quadruple patterning significantly increases the complexity of manufacturing, which may somewhat slow down the ramp up of the new memory ICs and cause delays in increased yield refinements.

Samsung claims that later this year it intends to use its 1x nm manufacturing technology to make LPDDR memory with increased capacity, which should help makers of smartphones, tablets and notebooks boost the amount of DRAM inside their devices or reduce pricing.

Use of the sub-20 nm process technology to produce 8 Gb DDR4 chips should make such DRAM ICs cheaper (eventually), which will help PC and server makers to install more memory without increasing prices of their products. At press time, one 8 Gb DDR4 chip costs $4.688, according to DRAMeXchange. By contrast, a 4 Gb DDR4 IC is priced at $1.672. Therefore, using low-capacity chips is still cheaper than using high-capacity DRAM devices. Meanwhile, if you are building servers, you might not have a choice but to utilize 8 Gb chips to create high-end memory modules (i.e., with 128 GB capacities). For that reason, for server manufacturers, Samsung’s new 8 Gb DDR4 chips should be useful.

Price Check: DDR4 Memory Down Nearly 40% in 6 Months, Expected To Continue

Price Check: DDR4 Memory Down Nearly 40% in 6 Months, Expected To Continue

Today we’re launching a new feature on the AnandTech Pipeline: Price Check. Here we’ll periodically examine hardware prices and analyze what’s behind recent price changes.

Just a year ago DDR4 dynamic random access memory (DRAM) was rather expensive and was sold at a noticeable premium compared to DDR3. Today, DDR4 memory modules cost less than DDR3 modules cost a year ago and continue to get more affordable. Next year prices of DDR4 are expected to decline further as manufacturers of DRAM are gradually increasing production of memory in general and DDR4 in particular.

DDR4 Gets Cheaper as Price Premium Over DDR3 Erodes

The average spot price of one 4Gb DDR4 memory chip rated to run at 2133MHz was $2.221 at press time, according to DRAMeXchange, one of the world’s top DRAM and NAND market trackers based in Taipei, Taiwan. Spot price of a similar memory integrated circuit (IC) was $2.719 in late September and $3.618 in late June, 2015. As it turns out, the price of a single 4Gb DDR4 DRAM IC dropped 38.62% in about half of a year.

Spot prices of DDR3 memory are also declining. One 4Gb DDR3 chip rated to operate at 1600MHz cost $1.878 in Taiwan at press time. A similar chip was priced at $2.658 in late June, which means that the spot price of a 4Gb DDR3 IC dropped 29.4% in less than six months.

The difference between a 4Gb DDR3 memory chip and a 4Gb DDR4 DRAM IC used to be approximately 26.5% in June. Today, a 4Gb DDR4 chip costs about 18.5% more than a 4Gb DDR3 memory IC.

Spot prices of DRAM chips directly affect prices of actual memory modules. At present one 4GB DDR4 SO-DIMM costs $18 in Taiwan, according to DRAMeXchange. A DDR3 4GB SO-DIMM is priced at $16.75. For many PC configurations, price difference between DDR3 and DDR4 memory modules is already negligible. Next year it will erode further and the new type of memory will replace DDR3 as the mainstream DRAM for personal computers and servers.

Retail Prices of DDR4 Modules Drop by Over 50% This Year

While spot and contract prices give a good idea about ongoing trends and help to understand the market in general, they do not reveal the retail situation, something that is important for the end user. As it appears, some DDR4 memory kits became over 50% cheaper this year.

Kingston’s HyperX Fury Black 16GB kit (2*8GB) rated to operate at 2133MHz with CL14 latency used to cost $229.20 in March at Amazon.com, according to CamelCamelCamel. Today, the dual-channel kit costs $108.99. Kingston’s HyperX memory modules are relatively affordable solutions for PC enthusiasts, which are used by system integrators too.

G.Skill’s latest Ripjaws V family of memory modules started to show up in retail only in October or November, but they have already got more affordable. Based on checks from CamelCamelCamel, the G.Skill Ripjaws V DDR4 16GB dual-channel kit rated to operate at 3200MHz used to cost $176.64 in early November, but the product is available today for $136.59.

Memory modules for high-end desktop systems tend to get cheaper faster and more significantly than solutions for mainstream PCs. Corsair’s Dominator Platinum 64GB DDR4 quad-channel kit capable of operating at 2666MHz with CL15 latency used to cost up to $1759.99 at Amazon.com early in 2015. By the middle of the year the price of the kit declined to around $1000 and currently the set of four premium 16GB DDR4 memory modules is available for $679.99.

Since the Dominator Platinum series is designed for ultra-high-end systems, it is not surprising that they are generally overpriced. Nonetheless, even such DDR4 memory solutions get more affordable these days.

Supply Exceeds Demand

There are two key reasons why computer memory is getting more affordable. Firstly, demand for DRAM is not high these days. Secondly, makers of memory chips are transiting to thinner process technologies, effectively increasing their output. Since supply exceeds demand, prices are getting lower.

Sales of personal computers as well as tablets dropped this year, which decreased demand for DRAM by the industry. According to International Data Corp. (IDC), shipments of PCs in the third quarter of 2015 totaled 71 million units, a 10.8% decline from the same period a year ago, but a 7.4% increase from the second quarter of 2015. Sales of tablets in Q3 2015 reached 48.7 million units, which is 12.6% less than in Q3 2014, but 8.94% more than in Q2 2015. By contrast, the industry shipped 355.2 million smartphones in the third quarter, up 6.8% year-over-year and 5.3% sequentially.

The vast majority of personal computers and many tablets use commodity DDR3 or DDR4 memory, whereas contemporary smartphones use LPDDR3 or LPDDR4 memory. Typically, when demand for PCs and commodity DRAM drops, memory makers start to increase output of more expensive server DRAM as well as LPDDR memory to offset revenue declines. According to DRAMeXchange, 40% of global DRAM bit output was LPDDR in Q3 2015.

Modest growth of smartphone sales amid declines of PCs and tablets in the third quarter barely helped DRAM makers to maintain their revenue at approximately the same level as in the second quarter. Global DRAM revenue in Q3 2015 totaled $11.298 billion, down 1.2% from Q2 2015, DRAMeXchange found.

DRAM Prices to Keep Declining

While there are only three major makers of DRAM left on the planet, they continue to fight for market share and profits. In a bid to cut-down costs, manufacturers of memory have to adopt thinner process technologies, which decreases sizes of memory cells and thus increases bit output per wafer. As a result, global supply of DRAM upsurges and affects prices.

This year Samsung Electronics continued its transition to 20nm DRAM manufacturing technology, whereas its rivals — Micron Technology and SK Hynix — only started to use their 20nm and 21nm fabrication processes. The thinner production technology helped Samsung to increase its profit margins and market share. The company controlled 46.7% of the DRAM market in Q3 2015, up from 45.1% in the second quarter. SK Hynix and Micron commanded 28% and 19.2% of the memory market, respectively, according to the market tracker.

Analysts from DRAMeXchange believe that transition to 20nm/21nm manufacturing technologies, slow economy and weak demand for electronics will negatively affect prices of DRAM going forward as supply will exceed demand. To stay profitable, DRAM makers will have to migrate to thinner fabrication processes faster and balance their product mixes.

“Looking ahead to next year’s DRAM market, the annual demand and supply bit growth rates are projected around 23% and 25% respectively,” said to Avril Wu, research director of DRAMeXchange. “Supply will still outpace demand by bit and average sales prices will continue to drop. Whether suppliers can turn a profit will mainly depend on their progression in technology migration and product-mix strategies.”

One good news for DRAM makers is that 20nm and 21nm process technologies help to reduce costs of DDR4 ICs in general and 8Gb DDR4 memory chips in particular. Such DRAM ICs are required to build high-capacity — 32GB, 64GB, 128GB — memory modules. Such products are sold at a considerable premium to server makers, which helps to bolster revenue and profits of memory producers.